Recently, another breakthrough has been achieved in the DRAM manufacturing process. This operation comes from SK Hynix. The company announced that it has successfully developed the world’s first LPDDR5X memory using the HKMG (High-K Metal Gate) process, using a 1αnm process. Compared with the previous generation, the new LPDDR5X reduces power consumption by 25%, increases data transfer rate by 33%, and operates within the ultra-low voltage range of 1.01V-1.12V set by JEDEC.
LPDDR5X is used in mobile devices represented by mobile phones. It is different from DRAM for PCs and servers. It has high requirements for low power consumption. At the same time, power consumption is reduced.
In the past, the HKMG process was mainly used for logic chips, especially processors such as CPU and GPU. In recent years, with the development of market demand, especially 5G communication, automotive intelligence, VR/AR and edge computing using AI The scene has higher and higher requirements for memory performance, and the DRAM process technology has evolved to the range of 10nm-20nm. At this time, the contradiction between high performance and low power consumption is gradually prominent, and HKMG is an effective way to solve this contradiction. First, it is DRAM applied to non-mobile devices, such as DRAM in servers, represents Samsung. Now, HKMG is introduced into DRAM for mobile devices, that is, LPDDR, which is also a landmark leap.
Where is HKMG sacred?
In the early days, aluminum was used as the gate material of integrated circuit transistors, and the related supporting structure adopted was aluminum metal/silicon dioxide. Later, polysilicon gate was developed, and the supporting structure adopted was polysilicon gate/silicon dioxide. Development, upgraded to polysilicon gate/SiON, and in 2007, HKMG was born.
Speaking of the origin of the HKMG process, we have to mention Intel, the traditional overlord of integrated circuits. In early 2007, Intel announced that it would use the new High-k (high dielectric constant) dielectric material HfO2 (hafnium dioxide) to replace the traditional SiON at the 45nm process node. The gate dielectric layer is used to improve the gate leakage current problem, and at the same time, the HKMG process is developed by using a metal gate instead of a polysilicon gate. The reason why it is 45nm is because when the semiconductor manufacturing process develops to this node according to Moore’s law, the gate dielectric is the first to reach the limit in the transistor. The traditional gate dielectric can no longer meet the requirements of transistor performance improvement and volume reduction, and it is easy to generate leakage. Problems such as electric current cause the reliability of the transistor to decline, and the high-K metal gate can solve this problem. The biggest feature of the HKMG process is the high dielectric constant. HKMG uses metal oxide as the gate dielectric. Compared with the traditional gate structure, it can reduce the gate leakage current, lower the operating voltage, and improve the reliability of the transistor. This is a major breakthrough in transistor technology since the 1960s and an important innovation in the semiconductor industry.
Metal oxides that can be used as high-K metal gate dielectrics need to have high band gap, stable physical and chemical properties, good thermal stability, thin film materials, compatibility with silicon elements, and compatibility with CMOS processes. HfO2 is the mainstream high-K metal gate dielectric material and is widely used in the semiconductor industry. However, HfO2 has disadvantages such as weak high temperature stability, poor compatibility with silicon, and prone to defects in deposited films. New high-K metal gate dielectrics are still in the development process. In addition, the compatibility of hafnium-based materials with polysilicon gates has been an issue, so metal gates are required.
Of course, the use of HKMG technology requires metal gates, and the selection of metal gates is affected by various factors, which will not be described in detail here.
Major DRAM manufacturers focus on HKMG
In recent years, Samsung Electronics, SK Hynix, and Micron, the three major memory chip manufacturers, have competed to develop 10nm-20nm process-level DRAM, and have successively introduced EUV lithography equipment, which was only used to manufacture various CPUs and other processors in the past. It can be seen that market applications have higher and higher requirements for DRAM, which makes the three major manufacturers have to work harder on the process technology. Therefore, after EUV, HKMG has become another focus.
In 2021, Samsung Electronics will use the HKMG process for DDR5 for the first time and promote the commercialization process. At that time, Samsung Electronics had stated that the power consumption of the HKMG DDR5 memory module was reduced by about 13% compared with the traditional process, and it planned to commercialize the memory in due course according to customer needs in the next-generation computing market. However, Samsung has not disclosed the commercialization case of this DRAM. This year, TechInsights disclosed relevant information that the chip has been applied to the products of a high-performance memory module manufacturer in Taiwan, China. It is reported that the DRAM is 16Gb DDR5 and manufactured using the HKMG process.
As an old rival of Samsung Electronics, SK Hynix, a major DRAM manufacturer, will naturally not sit back and watch Samsung take the lead in DRAM technology. Seeing that the opponent has adopted the HKMG process on DRAM for PCs and servers, SK Hynix has gone a step further and used this process in On the DRAM of mobile devices with higher power consumption requirements, that is, the LPDDR5X mentioned above.
So, how did SK hynix do it?
First of all, we must understand the basic structure of DRAM. The transistors that make up DRAM include the following types: cell transistors (Cell Transistor) that store data, core transistors (Core Transistor) that restore data, and peripheral transistors that involve control logic and data input/output ( Peripheral Transistor). With the advancement of technology, cell transistors have made some technological breakthroughs in increasing the storage capacity of DRAM. However, the characteristics of the original core transistors and peripheral transistors are becoming less and less suitable for the application requirements of DRAM, which has become a development bottleneck. Especially for peripheral transistors, only by further shrinking the process size can the performance be improved. Rapid performance improvement This is especially true for high-end products. Therefore, a new solution is needed to overcome the limitations of scaling polysilicon gate/SiON based transistors, and the HKMG process is an ideal solution in this case.
In order to convert the polysilicon gate/SiON of DRAM to HKMG gate, the relevant process needs to be changed, and the HKMG material, process and integration process must be optimized to suit the new material and new process. Specifically, it is necessary to develop a complex process (the specific situation is not known, because this is the core competitiveness of SK Hynix and is an absolute commercial secret) to solve the following problems.
One is to solve the compatibility problem. Compared with polysilicon gate/SiON, the thermal stability of HKMG is weaker, because DRAM needs special treatment at high temperature to realize the cell array structure, which is very different from the HKMG process used in logic chips (CPU, GPU, etc.) different. Therefore, the particularity of the HKMG process in DRAM will lead to a decrease in its reliability, which requires optimization of the HKMG process and the DRAM integration process to solve the problem of reduced reliability.
The second is new material control. Process control measures, such as measurement schemes for new materials, need to be introduced to prevent existing devices from being affected by new materials and processes.
The third is to develop cost-effective processes. Cost increases due to the introduction of new materials and processes can be minimized through process integration optimization.
The fourth is design and test optimization. With the change of the gate material, the characteristics and reliability of the transistor are completely different from the traditional polysilicon gate/SiON. In order to maximize the advantages of HKMG and enhance the reliability, a new design scheme is required and related tests are optimized.
In short, by integrating and optimizing HKMG into a form suitable for DRAM technology, developing a new platform, and ensuring the feasibility of the solution through pre-verification processes including pilot operations, so as to realize the use of HKMG process for DRAM mass production.
In the past, advanced manufacturing processes with low leakage and high performance were mostly used in logic chips, especially CPUs for PCs, servers, and smartphones. Today, these processes are beginning to be used in memories represented by DRAM, coupled with advanced technologies such as EUV. The “interoperability” of equipment and processes, the process nodes and manufacturing processes of logic chips and memories are getting closer and closer.
In the 1960s, when the CPU first started to be mass-produced, its manufacturing process was based on the memory SRAM process at that time. After decades of development, the changes in the application system have continuously increased the requirements for the CPU. Moore’s Law is advancing rapidly. Relatively speaking, memory does not have as high requirements on the process as CPU, but with the further development of applications, especially the evolution of big data and AI, the development pace of the original memory process is difficult to meet the application requirements. Therefore, the memory process technology is catching up, and it is now very close to the logic chip represented by the CPU.
This kind of development also makes the process barrier between CPU and DRAM smaller, which also caters to a certain extent to the development trend of integrated storage and computing, that is, the integration of CPU, AI and other functions into DRAM. The application of HKMG process on DRAM can further promote the development of integrated storage and computing.